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Micram 100G Development RangeFor Fiber-Optical Prototyping and Measurement Applications Building on its leadership in ultrafast 100G silicon, Micram has announced an impressive set of new components at the Optical Fiber Conference 2009 in San Diego, including the first silicon supporting the On-Off Keying (OOK) modulation scheme. This range of components greatly expands what aggressive developers can achieve over the next 12 to 18 months. In particular, we are announcing the first silicon supporting OOK, an important electrical modulation scheme that Micram is taking from the theoretical to the practical with our new 112Gbit/s Mux/Demux chips. 8 New 100G Development Chips In our new range of silicon, we provide several varied multiplexer, demultiplexer and MSDFF components supporting the 30 Gb/s and 60 Gb/s speed ranges. The MX4130F 4:1 Mux breaks new ground by providing a FPGA control layer, enabling very high speed data streams to be generated by off-the-shelf FPGAs from Xilinx and Altera. Also new from Micram are a series of single and quad transimpedance amplifiers (TIA) supporting both 3.3V and 5.2V applications, as well as a clock distribution module and frequency divider chip. Micram RF Modules provide a convenient and effective means of implementing Micram silicon in a test lab environment. Originally developed for internal use, Micram RF Modules eliminate time-consuming configuration work and provides a stable, reliable chip mount with easy access for any kind of test equipment.
For years, the Micram engineering team dealt with the many problems of building custom measurement rigs for its High-Speed Measurement Laboratory. Hours of soldering and fitting cables often resulted in poor performance and inaccurate measurements due to the lack of stable accessory components, such as suitable standardized connectors and provision for cooling, as well as signal reflections and signal losses caused by rig assembly and configuration problems. Based on experience, thought and discussion, the Micram team created a special mount for Micram chips under test, using brass modules and suitable high-frequency substrates and providing easy signal access through standard K- and V-connectors.
The following modules will be available (please select from Article Index at the top of this page to see details or download the datasheets from the Literature section of the Index):
To access the detailled datasheets or to request a quotation please use the login box to the left or register here and leave us a message. CDR14112 Clock & Data Recovery with 1:4 Demux with integrated VCO & PLL for up to 112 Gb/s The CDR14112 is a Ultrahigh-Speed CDR with integrated 1:4 Demultiplexer for data rates of 112 Gb/s and above. Key features are:
The CDR 14112 is a clock and data recovery circuitry with integrated 1:4 DEMUX, VCO and the opportunity to drive the module with an external clock signal. It is designed to fit for 107 to 112 Gb/s signal systems. The input amplifier is optimized for high input sensitivity (30mVpp min. input voltage swing) The module can selectively be used with an external clock signal or the internal VCO. To choose between both possibilities a clock selector is included. The default setting is the internal VCO drive. Packages:
MX41112 4:1 Mux for up to 112 Gb/s The MX41112 is a 4:1 high-speed Multiplexer for data rates up to 112 Gb/s. Key features are:
At the data inputs, the MX41112 consists of four symmetrical buffers which allow for single ended as well as differential drive. Furthermore the input buffers provide a high input sensitivity of 50 mVpp (single ended). The same holds for the clock input, which runs at half of the frequency of the output data rate (so called ’half-rate clocking’: e.g. 56 GHz clock for 112 Gb/s output data rate). Packages:
DMX1460 1:4 Demultiplexer for up to 60 Gb/s The DMX1460 is a 1:4 high-speed Multiplexer for data rates up to 60 Gb/s. Key features are:
The DMX 1460 is a 1:4 DEMUX with integrated frequency divider. All IOs use fully symmetrical input/output buffers which can operate either in single-ended or differential mode. The DMX1460 is designed for input data rates up to 60 Gb/s and a corresponding half rate clock nput up to 30 GHz. The module has two clock outputs providing full and half rate clock signals for the demultiplexed data outputs. The half rate clock output allows for easy connection of several DMX1460 modules to build higher order demultiplexer systems. Packages:
MX4130F 30Gb/s 4:1 Multiplexer with FPGA Interface The MX4130F is a 4:1 high-speed broadband multiplexer for data rates up to 30 Gb/s. Key features are:
At the data inputs, the MX4130F consists of four dentical input stages, which accept differential signals with +0.6 … +1.5 V common mode and 400 … 1200 mV swing. They incorporate a differential 100 Ohm termination to be compatible to the SerDes outputs of common FPGAs. The clock input runs at half of the frequency of the output data rate (so called ’half-rate clocking’: e.g. 15 GHz clock for 30 Gb/s output data rate. For data retiming, either the 15 GHz clock can be internally doubled, or an external 30 GHz clock may be used. The external clock also enables for adding jitter to the output data for testing purposes. Packages:
DFF60 / DFF30 MasterSlave D-Flipflop The DFF60 / DFF30 are Master-Slave-DFlipFlops with fully symmetrical input/output buffers which can operate either in single-ended or differential mode. The DFF60 is designed for retiming of data signals up to 60 Gb/s. The DFF30 is a scaled down version with lower power consumption for data rates up to 30 Gb/s but otherwise identical features. Packages:
FD60 60 GHz Frequency Divider with selectable ratio The FD60 is a high-speed frequency divider with selectable output ratios for divided frequency and trigger output. Key features are:
 The FD60 is a frequency divider which delivers a divided clock and a trigger signal for several applications. For both output signals the divider ratio can be separately selected.The module can easily be used for normal frequency division where the divider ratio can be selected in the range of 2 to 256. Simultaneously the FD60 provides a second output (Trigger output) supporting the lower frequency range of the primary output. In measurement tasks the FD60 offers easy handling, high flexibility and good signal quality.Packages: The FD60 is available as ruggedized K and/or V connector module.
CD15 15 GHz Versatile Clock Distribution ModuleThe CD15 is a versatile clock distribution module for locks up to 15 GHz. Key features are:
Main purpose of the CD15 is driving and synchronizing multiple multiplexers, ADCs or DACs. The symmetrical clock input buffer allows for ingle ended as well as differential drive. Additional pins aim for offset measurement and adjustment.Two main clock output buffers can be adjusted from 0.3 to 1.2V single-ended swing and can be used either single-ended or differential. The phase of the main clock can be controlled in a 95 ps range. For synchronizing multiple chips, the main clock can be switched to static low and restarted synchronously. To provide clocks for FPGAs, a programmable reference divider (ratio 1:2 up to 1:896) with two differential output buffers is included. Finally, for using either the build in LC-tank 15 GHz VCO or controlling external VCO, a PLL with a fixed divide-by-512 ratio and a crystal oscillator buffer is built-in. Main fields of application are Clock distribution and Synchronization of multiple ADCs, DACs, MUX. 
Download the preliminary datasheets of our new 100G products from the table below:
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