Micram

Although test is performed after the wafer run, test development starts already at the concept level of the ASIC design. There, the adequate test strategy is determined and further on considered throughout the entire design process.

In contrast to usual standard test strategies, well known from the CMOS world, the design for testability (DFT) of high performance ASICs requires a lot more attention and skills by the designer.Key objective is a design which keeps the high performance of the ASIC while maintaining all requirements expected from the test point of view.

Micram engineers are used to perform this challenging task. It is a part of Micram's standard design methodology which also involves the expertise and capability of the dedicated test facilities. This strategy insures hard- and software compatibility between design and test with minimum effort and components required (e.g. on the loadboard). As a result, MICRAM design strategy minimizes overall testing time and cost.

Micram doesn't stop at thinking about the test in terms of functionality. Also, test and measurement of at-speed performance, characterization, and root cause of error analysis are part of our Design&Engineering services. In order to speed up the time consuming phase from first silicon to production release, these services can be performed inhouse by using Micram's unique Rapid!Prototyping as well as Test&Measurement services.